Some time ago I wrote a post on different pulse power supply types. Before reading this post it is important to maybe first read that post. It is important to understand the pulse application you are designing for. This plays a very important role in the selection of the best pulse transformer topology. This post will focus on certain key aspects to show how to think and approach pulse transformer design.

Let us now look at the ideal transformer and what happens in a practical, real-world transformer. We were taught that the magnetisation and leakage inductance are the most notable differences between an ideal and real transformer. When it comes to pulse transformers a third aspect is introduced: the transformer capacitance. In most cases the magnetisation inductance can be ignored in pulse transformers and the leakage inductance, the inter-turn capacitance and the inter-winding capacitance are dominating the transformer characteristics. In the diagram below the relationship between the leakage inductance and equivalent transformer capacitance is shown for ideal and real transformers.

The ideal transformer has no leakage inductance or parasitic capacitance. As a result the ideal transformer has an infinite bandwidth. Unfortunately, this does not happen in the real world. A practical, real-world transformer has a finite leakage inductance and capacitance. In most cases both quantities cannot be minimised at the same time. A smaller leakage inductance implies a more closely packed winding configuration with a higher parasitic capacitance. A smaller capacitance in most cases implies larger winding separation and a larger leakage inductance. For a given set of design parameters (e.g. voltage, turns ratio, etc.) the product of the leakage inductance and total equivalent transformer capacitance remains more or less constant. In this respect, the design quality factor, *DQ*, can be defined:

DQ = L_{leakage} x C_{par},

where L_{leakage} is the equivalent leakage inductance and *C*_{par} is the total equivalent transformer capacitance as seen over the input (primary or secondary) of the transformer. The *DQ* factor translates into the bandwidth of a pulse transformer. Smaller *DQ* factors imply faster transformers with larger bandwidths. A well-designed pulse transformer will have a relatively small *DQ* factor - a good *DQ* performance. In most cases the *DQ* factor becomes larger for larger turns ratios. For high-voltage pulse transformers the *DQ* factor is also larger due to larger insulation distances required between transformer turns and windings. Different pulse transformer topologies will have more or less equal *DQ* factors, but the relative size of the leakage inductance and equivalent transformer capacitance can vary greatly.

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## Turns ratio, transformer capacitance and the DQ factor

The parasitic capacitance of a transformer cannot be calculated using simplified electro-static techniques. The key is to look at the voltage differences within the transformer. Larger voltage differences will result in larger displacements currents and larger equivalent capacitances. The transformer capacitance is divided into inter-turn and inter-winding capacitance. In the diagram below the inter-winding capacitance is shown. A simple single layer E-core transformer is used to demonstrate the concept.

**Inter-winding capacitance**

The primary winding is blue and the secondary winding is orange. The voltage over the primary winding is* V*_{p} and the resulting output voltage over the secondary winding is *V*_{s} = a.V_{p}, where *a* is the turns ratio. The inter-winding capacitance consists of the individual local inter-winding capacitances as indicated in the diagram. The bottom primary and secondary turns (indicates as *1*) are more or less at the same potential of 0 V. The voltage difference between them is almost zero and the effect of the inter-winding capacitance can be ignored. The voltage between the top windings (indicated as *N* and *M*, respectively), however, is given by the turns ratio and is equal to *(a-1)V*_{p}. For a turns ratio of 1 the voltage will be 0 and the inter-winding capacitance can be be ignored completely. However, the larger the turns ratio the bigger this voltage difference will be. The Miller-effect can be used to translate this capacitance into an equivalent parallel capacitance over the input of the primary winding. For large turns ratio this is given by:

C_{inter-winding,eq,p} ~ a^{2} x C_{inter-winding},

where *C*_{inter-winding} is the capacitance that can be measured with a multi-meter between the primary and secondary winding. This the main reason why it is difficult to build high-voltage step-up pulse transformers. The turns ratio has a detrimental effect on the *DQ* factor.

The inter-turn capacitance is shown in the figure below.

**Inter-turn capacitance**

The total inter-turn capacitance consists of the combination of several local inter-turn capacitances. These capacitances are connected in series and the equivalent capacitance is usually much lower compared to the inter-winding capacitance. For transformers with smaller turns ratios and ribbon windings, however, the inter-turn capacitance can be significant. The equivalent parallel inter-turn capacitance as seen over the primary input can be approximated as follows:

C_{inter-turn,eq,p} ~ a^{2} x C_{inter-turn,s} + C_{inter-turn,p},

where *Cinter-turn,p* and *Cinter-turn,s* are the series equivalent primary and secondary inter-turn capacitances, respectively. The total equivalent parasitic transformer capacitance is given by the sum of the equivalent inter-winding and inter-turn capacitances.

C_{par,p} = a^{2 }C_{par,s} = C_{inter-turn,eq,p} + C_{inter-winding,eq,p}

To summarise: Visualise capacitances in terms of voltage differences. To decrease the capacitance, try to increase distances between transformer parts with large voltage differences. For large turns ratios (*a* > 5) the *DQ* factor will be approximately proportional to the square of *a*.

## Leakage inductance and high-voltage insulation

The leakage inductance is caused by the magnetic field lines which do not pass through (or couple with) both the primary and secondary winding apertures. Most of the field lines inside the transformer core are coupled through both the primary and secondary windings. Some of the field lines between the core and windings are not coupled due to fringing. Most of the field lines between the primary and secondary winding spaces are not coupled. In high-voltage transformer sufficient insulation space is required between the primary and secondary windings. This inevitably increases the leakage inductance and *DQ* factor. High-voltage pulse transformers will in most cases have a larger *DQ* factor compared to low-voltage transformers.

## Pulse transformer topologies

The following are the most common pulse transformer topologies:

- Toroidal core
- Multi-layer interleaved windings
- Compartmentalised windings
- U-core split windings

This list is by no means complete. Two of the more exotic topologies are the distributed and coaxial transformers and are not covered in this post. Pictures of the different topologies are depicted below.

The diagram below indicates the *DQ* performance of the different topologies.

The **toroidal core transformers** have the best *DQ* performance (i.e. comparatively small *DQ* factor), i.e. highest bandwidth (= fast). With special winding configurations the lowest leakage inductance can be obtained with toroidal core transformers. However, they tend to have a relatively larger transformer capacitance. The **multi-layer interleafed winding transformers** have a slightly lower *DQ *performance. They tend to be smaller, but high-voltage insulation can be problematic. For voltages above 10 kV special winding techniques are required. **Transformers with compartmentalised windings** are the best choice for multi-purpose transformers with a good balance between leakage inductance and parasitic capacitance. In the photo above, the transformer was constructed with four secondary compartments sandwiched between two primary compartments. The spacing between windings can be varied to increase electrical insulation or decrease the leakage inductance. The **U-core split winding transformers** are only used when very low transformer capacitance is required or to improve electrical insulation for very high-voltage applications. They are easy to construct, but have the lowest *DQ* performance, i.e. lowest bandwidth (= slow).

In the next part of this blog post, the different topologies will be discussed in more detail. The best topology for different pulse power supply types will also be considered. Until then ... happy designing!